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Comparison of Various PV Technologies: Part I

Abstract
The latest solar photovoltaic research and production has focused on four types of technology: crystalline silicon (c-Si), CIGS, CdTe, and amorphous silicon (a-Si). This article, which will appear in two parts, reviews these four major PV technologies, as well as flexible polymer and organic solar cells. Part one, below, covers key concepts and discusses c-Si technology. Please check back in Q4 2009 for the article’s conclusion, which will discuss the remaining technologies.

Introduction
In the current global push for green energy, solar photovoltaic electricity represents a promising alternative to fossil fuels. Other options include wind, hydro, and geothermal power; however, converting sunlight to electric power with solar panels is clean and quiet. No greenhouse gases are produced, as no chemical reactions occur, such as combustion. Modules also can be scaled according to need, and they function in almost any environment that has incident solar radiation. Due to these advantages, solar cell production has doubled every two years or so.

Key concepts related to solar technology include conversion efficiency (η), fill factor (FF), internal and external quantum efficiency (QE), short circuit voltage (J_sc), and open circuit voltage (V_oc). The term grid parity refers to the crossover point where the cost of traditional power sources is equal to solar or any other alternative source. Efficiency is based on electrical power output versus solar power input and is calculated with the following equation:

P_m is the power at the max power point, E is the irradiance or light incident on the cell, and A is the cell area.

It is important to note that some cells are rated for performance as stand-alone units and some as complete panels. Obviously, due to connections and resistive losses, panel efficiency is always less than cell efficiency.

Fill factor is a calculation based on the maximum achievable voltage (V_oc) and current (I_sc) versus the power produced at the max power point (P_m). V_mp is the actual voltage achieved by a solar cell at maximum power. I_mp is the actual current a solar cell can produce at maximum power. The maximum power theoretically possible, P_theoretical, is V_oc x I_sc. The maximum power actually possible, P_m, is V_mp x I_mp. Dividing P_m by P_theoretical provides the fill factor of the device, which is always less than 100% because P_m is always less than P_theoretical (Figure 1).

Figure 1. Fill factor (Click graphic to enlarge.)

A solar cell’s maximum achievable voltage is called open circuit voltage. No power is produced at this point because current is zero, and if either current or voltage equal zero, so does power (P = V x I). The maximum current a solar cell can produce is called short circuit current. Likewise, no power is produced at this point because voltage is zero.

Internal quantum efficiency (IQE) concerns the number of photons that are absorbed versus the number of charge carriers (electrons and holes) produced. This can be improved by reducing recombination. Ideally, after forming an exciton, an electron-hole pair separates. Occasionally, however, the electron falls back into a valence bond with an atom and energy is released as a phonon (heat) or a photon (light) instead of creating electrical current. This process is called recombination. One method for reducing recombination is to place the electrodes closer to the active region through geometry or by minimizing film layer thickness.

External quantum efficiency (EQE) takes into account the amount of light that is transmitted or reflected and is therefore a lower value than internal QE. The use of a reflective back contact, an anti-reflective (AR) coating on the front surface, and a textured front surface can improve external QE. Aluminum-doped zinc oxide (AZO) can undergo acid etching to create such a textured surface. This texture helps contain and internally reflect photons by causing incident and internally reflected light to travel at an angle, which increases the likelihood of creating a charge carrier (Figure 2).

Figure 2. Chemical etching of the TCO layer (Click graphic to enlarge.)

There are other concepts related to solar technology to consider, such as manufacturing cost and lifetime issues. Lifetime is important in calculating the payback time, or return on investment (ROI). These figures vary widely based on the particular decrease in efficiency of a given cell, as that can depend on environmental conditions. The ROI varies based on the projected cost of present electricity production.

Overview of Solar Cell Functionality

Figure 3. Simplified schematic of a solar cell

The following explains how photons from sunlight are absorbed into the semiconductor within a solar panel to create current:

1. A photon is absorbed and gives energy to an electron in a valence bond within the semiconductor layer.
2. The electron is raised to the conduction band.
3. The excited electron moves to another atom and creates an exciton—an electron and hole pair.
4. The hole is left behind and travels in the opposite direction of the electron. (The travel directions of the hole and electron depend upon the electric field and/or work function of the electrodes. This force must be greater than the existing coulomb attraction in order to send the electron and hole in the desired directions.)
5. This process repeats itself as electrons move into holes, creating a “stream” of electrons that moves from cathode to anode to create current.

In order for an electron-hole pair to be created, the energy of the photon must be greater than that of the electron contained in the material structure. The science of solar cell technology is based on matching the bandgap energy of the electron to the incident energy of the photons from the sun. Figure 4 shows wavelength and energy in eV of light from the sun. Most solar cells are designed to absorb light at or below the visible spectrum (300 to 600 nm).

Figure 4. Energy versus wavelength of sunlight

Experimental
This study addresses crystalline silicon (c-Si) technology, as well as the three main contenders for thin-film solar: CdTe, CIGS, and amorphous silicon (a-Si).

c-Si
Crystalline silicon is the oldest and also the leading technology for solar cell production today. It is still the leading topology, with over 20% efficiency obtained. This technology has similarities to integrated circuit technology, as it is also a crystalline-silicon-based product. C-Si technology began using silicon wafers, although additional options are now available. The high conversion efficiencies of c-Si cells are a result of starting with a crystalline wafer or ingot on which to build the device structure. The highest-quality ingots are fabricated using the Czochralski process, but it is possible to use poly-silicon fabricated with less expensive casting processes. Cost can be reduced, but performance will also suffer. Some companies are basing technology on metallurgical grade silicon (MG-Si). The amount of available silicon will dictate the price and production opportunity of c-Si solar cells. A number of projections exist regarding the use and production capability of silicon. It is interesting to note that in the future, crystalline silicon usage may be dominated by solar rather than semiconductor.

The silicon atom has 14 electrons and can interact via its four outermost valence electrons. When in a crystal lattice, such as is pure silicon in wafer form, each silicon atom shares one electron with four neighboring atoms. This type of arrangement continues throughout the material and includes a crystal lattice with long-range order. The covalent bond of this electron is about 1.1 eV. Sunlight has a range of about 0.5 to 3 eV. If the light absorbed by the material has enough energy and interacts with an electron, it may raise the electron into the conduction band to create electrical energy. Through doping the pure silicon material, the solar cell can be tuned to create electricity from photons of appropriate energy. For example, gallium arsenide would absorb light of about 1.43 eV and aluminum gallium arsenide would increase that to about 1.7 eV. So, doping the silicon material produces a bandgap that coincides with the energy of sunlight. Similar to a diode, a solar cell is created by doping one layer with excess electrons, the n or negative region, and one layer with insufficient electrons, the p or positive layer. The positive layer is also thought of as having a hole, an absence of electrons. These layers set up an electric field that drives current through the circuit. Phosphorous is an example of a material used for negative doping, as it has an extra electron, and boron is an example of a material used for positive doping, as it has one fewer electron. These materials can be thermally diffused into the crystal lattice. The layer separating the n and p layer is the junction.

The photons are absorbed in the p layer of the device. It’s important to maximize the photon-electron interactions and to reduce the chances that an electron will recombine with a hole and be lost. Maximizing absorption and minimizing recombination increases solar cell efficiency. It is also important that the photons are absorbed in such a way as to free an electron. This means that the photon’s energy must be higher than the bandgap of the material. The various possibilities for doping of silicon will determine the amount of energy required.

Figure 5 shows a simplified schematic of a c-Si solar cell and lists the processes and AE products associated with each layer.

Figure 5. c-Si

Table 1 gives detailed product recommendations for each layer of a c-Si solar cell.

Please check back in Q4 2009 for this article’s conclusion, which will discuss CIGS, CdTe, and amorphous silicon (a-Si), as well as flexible polymer and organic solar cells.

Are you eager to improve throughput and cell efficiency in your PV manufacturing operation?

AE’s solar experts offer advice for the solar industry’s most pressing manufacturing issues.

We’d love to hear from you! Please send your questions and comments to PVSunTimes@aei.com.

1. My AZO process is arcing a lot, which I understand is typical of this material. My power supply is handling the arcs adequately, but it won’t reach set point. Why is this happening, and what can I do about it?
2. Are any new methods available to increase the deposition rate of reactive sputtering processes? 
3. Is this difficult to set up?
4. What kind of results can be achieved with voltage control?

1. My AZO process is arcing a lot, which I understand is typical of this material. My power supply is handling the arcs adequately, but it won’t reach set point. Why is this happening, and what can I do about it?
   Answer: Certain DC-powered processes, such as AZO, can have extremely high arc rates. Due to inherent properties of the material, AZO tends to arc hundreds or even thousands of times per second. Effective arc-management technology can successfully handle arcing even at such extreme rates. However, in order to extinguish an arc, the power supply shuts down for a very short period of time and then turns on again. Usually, after it turns back on, its output returns to set point. The problem you describe arises if there are too many arcs and the power supply is shutting down so often that the amount of actual delivered power is falling below set point.
   
   A new technology offers a solution for this problem. AE has developed an exclusive algorithm that enables our power supplies to effectively quench arcs while compensating for any sputter rate decrease caused by arc handling. Set point compensation automatically adjusts your AE power supply’s output based on its arc response level. This ensures that delivered power remains at set point despite the cumulative off-time of quenching hundreds or thousands of arcs per second. Please contact us for more information about how this feature can benefit your particular process.

    

   
   
   Figure 6. Set point compensation ensures that delivered power remains at set point despite the cumulative off-time of quenching hundreds or thousands of arcs per second (Click graphic to enlarge.)
   
   
   
   
   
2. Are any new methods available to increase the deposition rate of reactive sputtering processes?
   Answer: Yes. AE’s Crystal^® power supplies offer voltage control software that enables dramatically higher sputter rates. As an additional benefit, this software also greatly reduces input power requirements. As you know, for quite some time, process engineers have been working to achieve a high rate on doped silicon, aluminum, zinc, and tin—all in the reactive mode. Many power-supply companies have claimed to run in voltage-control mode to enable process engineers to run high on the curve. Indeed, these power supplies are commonly used, and all of them can run in transition mode until arcing occurs. When an arc appears, the power supply reacts to it and shuts down to clear it. The atmosphere then turns rich in reactive gas, and when the supply resumes power delivery, the parameters have changed so much that power and current are much higher, causing major process instabilities. If major arcs occur in rapid succession, the process begins to break down and often needs to be stopped and re-set. This reduces throughput, undermining a major process goal.
   
   Engineers at Advanced Energy have created a method that allows stable operation of the LF power supply in voltage control—even during heavy arcing. The Crystal power supply can run high on the curve in transition mode with few to no requirements to adjust settings or equipment. This can take the place of running in the full reactive mode, which is stable but, as you’re probably experiencing, slow.
   
   Figure 7 shows how the Crystal power supply reacts to an arc when in voltage-control mode and running in the transition regime.
   
   
   
   Figure 7. Voltage-control arc recovery (Click graphic to enlarge.)
   
   
   Please contact us for more information about how Crystal voltage control can benefit your reactive sputtering process.
   
   
   
3. Is this difficult to set up?
   Answer: This solution is easily set up with few to no adjustments required for the chamber or sputter zone:
   
   Preliminary Steps
   
   1. Run the chamber with argon gas in pressure control mode.
   2. Burn in the cathodes in argon and watch for the normally characterized peak voltage.
   
   Process Steps
   
   1. Set the Crystal power supply in voltage-control mode.
   2. Make certain the argon flow is correct for proper sputtering pressure. The reactive gas should not be flowing at this time.
   3. Perform hysteresis curve to determine where to set voltage.
   4. Turn on the Crystal power output. The power will be very low.
   5. Turn on and adjust the reactive gas until the desired power is reached.
   6. Start the process.
      
      
      

4. What kind of results can be achieved with voltage control?
   Answer: Figure 8 shows the results of a test that compared power control and voltage control for Si₃N₄ deposition. In power-control mode, 150 kW of output power was used to deposit 56 nm. At the same line speed in voltage-control mode, 83.5 kW of output power was used to deposit 196 nm. Voltage control significantly reduced power requirements, while also dramatically increasing deposition rate.
   
   
   
   Figure 8. Comparison of power output and deposition thickness for Si₃N₄ deposition